H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/149
H01L 29/76 (2006.01) H01L 27/06 (2006.01) H01L 29/10 (2006.01) H01L 29/778 (2006.01)
Patent
CA 1223673
Mode Selection Layer for Semiconductor Device ABSTRACT A field effect transistor structure suitable for use in an array of such structures disposed on a common substrate is formed with a source terminal, a drain terminal, and a gate terminal upon an upper surface of a semiconductor chip. The chip includes a first layer and a second layer, the first layer being grown epitaxially upon the second layer. The first layer forms a part of the gate terminal and the second layer includes a charge conduction channel coupling the source terminal and the drain terminal. A pocket layer is disposed in the second layer beneath the terminals of the transistor structure and is doped with either an donor dopant or an acceptor dopant for altering the electric field at the conduction channel to insert electrons or remove electrons therefrom so as to convert an operating mode from either an enhancement mode to a depletion mode or from a depletion mode to an enchancement made. A substrate with a terminal on the backside thereof may be placed contiguous the bottom of said second layer, the back terminal being applied to a negative source of voltage for a transistor structure of n-channel format. The semiconductor material of the chip is a obtained from compounds of elements of the groups III and V of the periodic table.
504661
Solomon Paul M.
Wright Steven L.
International Business Machines Corporation
Rosen Arnold
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