H - Electricity – 03 – M
Patent
H - Electricity
03
M
H03M 5/14 (2006.01) G11B 20/14 (2006.01)
Patent
CA 2580388
This invention relates to a method of converting a user bitstream into a coded bitstream by means of a runlengh limited (d, k) channel code where the channel code has a constraint of d=1. In order to ensure an improvement in bit detection performance an additional RMTR constraint of r=2 is imposed limiting to two the maximum number of minimum runs allowed by the d=1 constraint. An additional advantage of such a code is a limitation of the back-tracking depth of a Viterbi bit-detector Based on two different k constraints the construction of such d=1 and r=2 codes is disclosed.
L'invention concerne un procédé pour convertir un flux de bits d'un utilisateur dans un flux de bits codés au moyen d'un code de canal (d, k) à longueur de course limitée, ledit code de canal présentant une contrainte de d=1. L'objectif de l'invention est d'améliorer les performances de détection de bits. A cet effet, la contrainte RMTR supplémentaire utilisée de r=2 est imposée, de manière à limiter le maximum et le minimum des courses autorisées sur la contrainte d=1. De manière avantageuse, le code de l'invention permet de limiter la profondeur du retour en arrière d'un détecteur de bits de Viterbi. La construction des codes d=1 et r=2 est fondée sur deux contraintes k différentes.
Coene Willem M. J. M.
Padiy Alexander
Koninklijke Philips Electronics N.v.
Smart & Biggar
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