H - Electricity – 01 – F
Patent
H - Electricity
01
F
H01F 41/04 (2006.01) H01F 17/00 (2006.01)
Patent
CA 2186055
A monolithic multilayer ultra thin chip inductor (10) is manufactured with two terminals (12) and (14) on the same end of the component (10) to reduce the mechanical stresses caused by a coefficient of expansion mismatch. A third no-connect terminal (16) located on the opposite end may be used to mount the component (10) when a more rigid connection is required. The inductor is constructed using a bottom and top coil layer (18) and (40), each having a coil and forming a termination point corresponding to the inductor terminals. The opposite ends of the coils form connection ends (24) and (68) and are electrically connected to form a continuous coil from one terminal (12) to the other (14). Optionally, a number of intermediate coil layers (28) can be included between the bottom and top coil layers (18) and (40). The coil layers are selected from a set of coil layers. As a result, the total number of coil turns can be obtained by selecting the appropriate coil layers.
Adelman Jeffrey T.
Person Herman R.
Tschosik Bruce A.
Veik Thomas L.
Zwick Scott D.
Dale Electronics Inc.
Ridout & Maybee Llp
Vishay Dale Electronics Inc.
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