Monolithic programmable gain-integrator stage

Details Monolithic programmable gain-integrator stage Monolithic programmable gain-integrator stage

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G06G 7/18 (2006.01) H03F 1/30 (2006.01) H03F 3/00 (2006.01) H03G 3/00 (2006.01) H03K 5/00 (2006.01)

Patent

CA 1187950

MONOLITHIC PROGRAMMABLE GAIN-INTEGRATOR STAGE Yusuf A. Haque Vikram A. Salatore Jeffrey A. Schuler ABSTRACT A switched capacitor gain stage (110, 120) having a programmable gain factor. This gain factor is determined by the connection of desired gain determining components (14-17; 25-28) contained within a component array (100, 101). A sample and hold circuit (46) is provided for the storage of the error voltage of the entire gain-integrator stage. This stored error voltage (Verror) is inverted and integrated one time for each integration of the input voltage (Vin), thus eliminating the effects of the inherent offset voltages of the circuit from the output voltage (Vout).

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