G - Physics – 06 – F
Patent
G - Physics
06
F
340/165
G06F 13/42 (2006.01)
Patent
CA 1327638
Abstract A MONOLITHIC SKEW REDUCTION SCHEME FOR SEPARATELY CLOCKED DATA TRANSFERS A system for reducing skew in the parallel transmission of digital data slices is provided. The system includes a transmitter unit comprising a plurality of transmitter memory devices. Control logic provides a strobe signal to each transmitter unit memory device to implement the transfer of a desired number of data characters from the transmitter unit to a receiver unit. Both its associated data slice and the strobe signal are transferred from each transmitter unit memory device to the bus via an associated transmitter unit bus driver. Each data slice and its associated strobe signal are then transferred from the bus to a corresponding receiver unit memory device via a corresponding receiver unit bus receiver device. Each receiver unit memory device includes means for generating a "receiver-full" status signal that indicates that all data slices transferred from the corresponding transmitter unit memory device have been received. These "receiver-full" status signals are monitored and a "transfer-done" status signal is issued when all data slices transferred from the transmitter unit have been received by the receiver unit. Skew within a particular transmission path is compensated for by providing a controlled delay path for the clock signal in each device within that path.
614291
Balakrishnan Ramanatha V.
Young Desmond W. L.
National Semiconductor Corporation
Smart & Biggar
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