Mos transistor for high density integration circuits

Details Mos transistor for high density integration circuits Mos transistor for high density integration circuits

H - Electricity

01

L

H01L 29/786 (2006.01)

Patent

CA 2399115

The invention concerns a MOS transistor produced in a silicon film of a SOI substrate (10), said film (13) being lightly doped and having a thickness less than 30 nm, the source (14) and drain (15) contacts being of the Schottky type with the lowest possible Schottky barrier height for the majority carriers, the operating conditions of the transistor being of the accumulative type.

L'invention concerne un transistor MOS réalisé dans la couche mince de silicium d'un substrat SOI (l0), ladite couche mince (13) étant faiblement dopée et ayant une épaisseur inférieure à 30 nm, les contacts de source (14) et de drain (15) étant du type Schottky à hauteur de barrière Schottky la plus faible possible pour les porteurs majoritaires, le régime de fonctionnement du transistor étant du type accumulation.

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