Multi-bit sigma-delta dac

H - Electricity – 03 – M

Patent

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H03M 1/72 (2006.01)

Patent

CA 2232591

In multi-bit sigma-delta digital-to-analog (D/A) conversion, a highly linear switched-capacitor digital-to-analog converter (17) (DAC) in accordance with the invention is employed. The inventive DAC includes an array of holding capacitors (C12, C11, C21, C22) connected in parallel to an opamp (23) having a finite gain. A conversion period is divided into subintervals and each holding capacitor is associated with one of the subintervals. The inventive DAC also includes switches (S10, S20, S12, S22, S11, S21) for transferring a packet of charge to each holding capacitor during the subinterval associated with the holding capacitor.

Pour effectuer une conversion N/A multibit sigma-delta, on utilise un convertisseur N/A (17) hautement linéaire à commutation de capacité objet de l'invention. Ledit convertisseur comporte une série de condensateurs de maintien (C12, C11, C21, C22) reliées en parallèle à un amplificateur opérationnel (23) à gain fini. Une période de conversion se divise en sous-intervalles respectivement associés à chacun des condensateurs de maintien. Le convertisseur N/A (17) objet de l'invention comporte également des commutateurs (S10, S20, S12, S22, S11, S21) transférant un paquet de charge à chacun des condensateurs de maintien pendant le sous-intervalle associé au condensateur de maintien.

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