Multi-chip module

H - Electricity – 01 – L

Patent

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Details

H01L 25/065 (2006.01) H01L 21/98 (2006.01) H01L 23/24 (2006.01) H01L 23/538 (2006.01) H01L 25/16 (2006.01) H05K 1/14 (2006.01) H05K 3/34 (2006.01) H05K 3/36 (2006.01) H05K 3/46 (2006.01)

Patent

CA 2171458

Bare IC chips (201 through 203) are mounted on respective areas (101 through 103) of a printed wiring board (100). The outer electrode Pads (105) on the peripheries of the board (100) are soldered to another printed wiring board (1) such as a mother board. Lead pads (107) and the outer electrode Pads (105) are interconnected through a circuit pattern (109), through holes (111) and interstitial via holes (112). The circuit pattern (109) is disposed on a die bonding surface of the bare IC chips (201 and 202) for which insulation is not necessary. A multi-chip module is thus completed.

Des puces nues (201 à 203) sont montées dans des régions (101 à 103) d'une carte à circuits imprimés (100). Les puces sont soudées à une carte mère au niveau de plots d'électrodes externes (105) sur leurs bords. Des plots conducteurs (107) et les plots d'électrodes externes (105) sont reliés par l'intermédiaire d'une configuration de circuits (109), de trous traversants (111) et de trous d'interconnexion entre couches (112). Une configuration de circuits (109) est créée sur une surface de soudage de dé des puces à CI nues (201, 202) où l'isolation n'est pas nécessaire. Ces opérations permettent de produire un module multipuce.

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