Multi-dimensional coding for error reduction

Details Multi-dimensional coding for error reduction Multi-dimensional coding for error reduction

H - Electricity

04

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354/105

H04L 27/00 (2006.01) H03M 5/14 (2006.01) H03M 13/00 (2006.01) H03M 13/25 (2006.01) H04L 1/00 (2006.01)

Patent

CA 1289667

MULTI-DIMENSIONAL CODING FOR ERROR REDUCTION Abstract A stream of binary bits is converted into blocks of eight parallel bits. A first group of five of the eight bits addresses a memory device which has thirty-two code words each having four numbers representing the coordinates of signal points in four-dimensional space. The remaining three of the eight bits are expanded to four bits by a convolutional encoder having three bits of memory. These four bits are then used to multiply the four numbers of a code word read out from the memory device. This method permits a block of eight binary bits to be coded into any one of five hundred and twelve four-dimensional code words.

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