G - Physics – 06 – F
Patent
G - Physics
06
F
354/230.81
G06F 9/00 (2006.01) G06F 9/38 (2006.01)
Patent
CA 1103369
MULTI-INSTRUCTION STREAM BRANCH PROCESSING MECHANISM ABSTRACT In a high-performance computer which prefetches and predecodes instructions for sequential presentation to an execution unit, at least three separately gated and sequenced instruction buffers for prefetched instructions permit continued sequential predecoding and buffering of instructions from three independent instruction streams identified by multiple branch instructions, some of which may be conditionally executed. A number of pointers identify a particular one of the multiple instruction buffers. A first pointer identifies one of the instruction buffers which is to receive the target instruction identified by a branch instruction decoded from another instruction stream contained in another instruction buffer. Various branch instructions are predicted to be successful or unsuccessful, and in response to this prediction, a second pointer is set to control gating of the proper instruction to an instruction decoding mechanism, either from the original instruction stream of the branch instruction or from the instruction buffer which contains the target instruction. A third pointer identifies the one of the multiple instruction buffers which contained the instruction last transferred to the instruction execution unit. A fourth pointer, contained in a queue of predecoded instructions, and which is associated with each branch instruction to be presented to the instruction execution unit, identifies the one of the instruction buffers which was enabled to receive the target instruction. Result signals from the instruction execution unit, in response to execution of conditional branch instructions, will reset various pointers and busy triggers associated with each instruction buffer, set one pointer to the same condition as another pointer, or leave certain pointers in a present state, such that the next sequential instruction to be transferred to the instruction execution unit is from the proper instruction stream based on the result of the branch on condition instruction.
314524
Hughes Jeffrey F.
Liptay John S.
Rymarczyk James W.
Stone Stanley E.
Gammie Alexander P.
Interntional Business Machines Corporation
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