Multi-layer circuit assembly and process for preparing the same

H - Electricity – 05 – K

Patent

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Details

H05K 3/44 (2006.01) H01L 21/48 (2006.01) H05K 1/05 (2006.01) H05K 3/00 (2006.01) H05K 3/38 (2006.01) H05K 3/42 (2006.01)

Patent

CA 2505315

Processes for fabricating a multi-layer circuit assembly and a multi-layer circuit assembly fabricated by such processes are provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias, these area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; and (c) applying a layer of metal to all surfaces of the substrate. Additional processing steps such as circuitization may be included.

Cette invention concerne des procédés de fabrication pour ensembles circuits multicouches et les ensembles circuits multicouches ainsi obtenus. Ce procédé consiste à : (a) prendre un substrat dont une zone au moins comprend une pluralité de trous traversantsdont la densité s'établit à 500-10,000 trous/pouce?2¿ (75-1550 trous/centimètre?2¿); (b) appliquer un revêtement diélectrique qui épouse toutes les surfaces exposées du substrat; et (c) appliquer une couche de métal sur toutes les surfaces du substrat. Le procédé peut englober d'autres opérations telles que la réalisation de circuits.

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