G - Physics – 06 – F
Patent
G - Physics
06
F
354/233
G06F 9/22 (2006.01) G06F 9/28 (2006.01) G06F 9/38 (2006.01) G06F 9/46 (2006.01) G06F 15/167 (2006.01) G06F 15/80 (2006.01)
Patent
CA 1045247
ABSTRACT OF THE DISCLOSURE This disclosure relates to a multi- microprocessor unit which is adapted for implementation in a single MOS semiconductor chip, which unit includes a plurality of sets of registers where each set represents a different processor. The unit further includes common elements which are shared by the different sets of registers in a time multiplex manner. The shared elements include two scratch pad memories, an arithmetic logic unit, and a control unit which incorporates a composite read only memory from which control signals are fetched to initiate the respective data transfers and arithmetic operations. This control memory acts as a decoder for encoded microinstructions retrieved from outside of the multi-processor unit. In this sense, the present invention employs both vertical and horizontal microprogramming as these terms are conventionally defined. The different sets of dedicated registers are formed of 4-bit shift registers so as to permit a four-way time slicing among the processors.
235105
Lee David C.
Levy Bernardo N.
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