Multi-port random access memory

Details Multi-port random access memory Multi-port random access memory

G - Physics

11

C

G11C 8/00 (2006.01)

Patent

CA 2180421

Disclosed is an architecture of a RAM (random access memory) with BIST (built-in self test) or functional test function. The RAM has a memory cell for storing differential or single-ended binary data and bit line signals are fully differential or single-ended. Shadow write is applied to read only and read-write bit lines. With the test function, port-to-port bit line shorts and port-to-port word line shorts are sensitized.

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