Multilayer circuit arrangement and method of manufacturing...

H - Electricity – 05 – K

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H05K 1/02 (2006.01) H05K 1/00 (2006.01) H05K 3/00 (2006.01) H05K 3/46 (2006.01)

Patent

CA 1237819

Attorney's Docket No. 7605 CAN INVENTOR: JOSEF ELSENER INVENTION: MULTILAYER CIRCUIT ARRANGEMENT AND METHOD OF MANUFACTURING SUCH MULTILAYER CIRCUIT ARRANGEMENT AND ITS ELECTRIC CONNECTIONS ABSTRACT OF THE DISCLOSURE A multisubstrate or multilayer circuit arrangement and a method of manufacturing such multisubstrate circuit arrangement and its electrical connections is proposed. The arrangement of the multisubstrate circuit is essentially a three layer construction comprising a first, double-sided metallized support element, a second, one-sided metallized support element as well as an insulating material arranged between the two. Conducting tracks are etched from the metal layer of an intermediate plane between the first and second support elements and then the above mentioned elements are bonded into a single unit. A first set of holes is bored at pre-programmed locations using a first hole schedule and starting from a component plane. The unit is inverted and a second set of holes is bored at pre-programmed locations using a second, mirrored hole schedule and starting from a lower plane. After the metallization of all holes, the contact and conducting surfaces or pads on the component plane and the corresponding conducting tracks on the lower plane are etched. WWK/04;02/se:SENC6 - 2 -

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