Multiple buffer time division multiplexing ring

Details Multiple buffer time division multiplexing ring Multiple buffer time division multiplexing ring

H - Electricity

04

J

H04J 3/06 (2006.01) H04J 3/12 (2006.01) H04L 12/43 (2006.01)

Patent

CA 2075475

2075475 9112677 PCTABS00006 A multiple-buffer time-division-multiplexing ring (16) is provided for enabling different computers using various communication protocols with different delay constraints to use the ring simultaneously for communication with a plurality of peripheral devices while at the same time maximizing the number of connections to peripheral devices which may be supported by the multiplexer ring. The multiple-buffer time-division-multiplexing ring (16) utilizes two or more parallel or serial buffers (20a, 20b) in the ring (16) which may be located in a permanently or temporarily assigned master node (10). Digital data are carried around the ring (16) in a plurality of time-slots wherein one or more time-slots are allocated for each user of the ring. The time-division-multiplexing ring (16) uses the multiple buffers (20a, 20b) to advance time-slots for delay-sensitive protocols ahead of time-slots for non-delay-sensitive protocols.

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