Multiple communication interface between processor and...

H - Electricity – 04 – L

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354/233

H04L 5/14 (2006.01) G06F 13/42 (2006.01) H04L 29/06 (2006.01)

Patent

CA 1198520

ABSTRACT The invention provides a multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, adapted to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type/ such as X25, X75 and No. 7 of CCITT.

432551

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