Multiple facility operating system architecture

G - Physics – 06 – F

Patent

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Details

G06F 15/16 (2006.01) G06F 9/46 (2006.01) G06F 13/00 (2006.01) G06F 15/173 (2006.01) H04L 12/28 (2006.01)

Patent

CA 2066566

A computer system employing a multiple facility operating system architecture is disclosed. The compu- ter system includes a plurality of pro- cessor units (12, 14, 15) for imple- menting a predetermined set of peer- level facilities (162, 164, 166, 168) wherein each peer-level facility in- cludes a plurality of related functions and a communications bus (22) inter- connecting the processor units. Each of the processor units includes a cen- tral processor (30, 80, 100) and the stored program (68, 86, 134) that, up- on execution, provides for the imple- mentation of a predetermined peer-le- vel facility and for performing a mul- ti-tasking interface function. The mul- ti-tasking interface function is re- sponsive to control messages for se- lecting for execution functions of the predetermined peer-level facility and is responsive to the predetermined peer-level facility for providing con- trol messages to request or to respond to the performance of functions of another peer-level facility of the computer system. The multi-tasking interface functions of the processor units communicate among one another via the communication bus.

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