Multiple frequency digital phase locked loop

Details Multiple frequency digital phase locked loop Multiple frequency digital phase locked loop

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H03L 7/00 (2006.01) H03K 5/00 (2006.01) H03K 5/22 (2006.01) H03K 23/66 (2006.01) H03L 7/099 (2006.01) H04L 7/033 (2006.01)

Patent

CA 1281087

MULTIPLE FREQUENCY DIGITAL PLL Abstract An improved multiple frequency digital phase-locked loop circuit is described. The improved digital phase- locked loops utilizes a single circuit to effect both phase and frequency adjustments. The multiple frequency digital phase-locked loop effects phase adjustments by selectively combining or subtracting a reference clock signal with a derived programmable clock signal thereby generating a composite digital phase-locked loop clock signal. The multiple frequency provides frequency adjustments by selectively adding or subtracting pulses from the composite clock signal at a rate determined by a programmably controllable clock signal. The improved multifrequency digital phase-locked loop is suitable for use as a tone detector with the addition of a lock detector wherein the phase-locked loop can be programmed for a plurality of known operating frequencies.

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