Multiple input and multiple output or/and circuit for field...

Details Multiple input and multiple output or/and circuit for field... Multiple input and multiple output or/and circuit for field...

H - Electricity

03

K

328/127

H03K 19/094 (2006.01) H03K 3/356 (2006.01) H03K 19/0956 (2006.01)

Patent

CA 1244099

ABSTRACT OF THE DISCLOSURE An OR logic function is provided in at least two separate circuit branches by diodes in parallel summing current at a first logic node and a first circuit branch and diodes in parallel summing current at a second logic node in a second current branch. An AND logic function is performed at a third logic node by using additional diodes connected in parallel at the third logic node so as to share current passing through the third logic node, with the logic conditions at the first and second logic nodes serving as the inputs to the AND logic function. The logic condition at the third logic node is applied to the gate of a switching FET. The switching FET is conveniently employed to invert the logic condition at the third logic node. The invention is particularly suited for use with MESFET logic families using gallium arsenide (GaAs) substrates.

502509

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