Multiple lead probe for integrated circuits in wafer form

Details Multiple lead probe for integrated circuits in wafer form Multiple lead probe for integrated circuits in wafer form

G - Physics

01

R

356/188

G01R 31/02 (2006.01) G01R 1/073 (2006.01)

Patent

CA 1279936

Abstract A probe assembly for use in testing an inte- grated circuit embodied in an integrated circuit chip in wafer form, comprises a stiff support member formed with an aperture, and a membrane. Both the support member and the membrane comprise dielectric material and portions of conductive material supported by the dielectric material in electrically-insulated relationship. The portions of conductive material of the membrane constitute inner contact elements distributed over a main face of the membrane in a pattern that corresponds to the pattern in which contact areas are distributed over the contact face of the chip under test, outer contact elements distributed about a peripheral region of the membrane in a second pattern, and transmission lines extending from the inner contact elements to the outer contact elements respectively. The portions of conductive material of the support member comprise inner contact elements distributed about the aperture in a pattern corresponding to the second pattern, and transmission lines extending from the inner contact elements of the support member for connection to testing apparatus. The membrane is secured to the support member in a manner such that the membrane overlies the aperture in the support member. The outer contact elements of the membrane are in electrically-conductive contact with respective inner contact elements of the support member. The inner contact elements of the membrane include contact bumps that project from the membrane beyond other elements that lie at a distance of less than twice the diameter of the wafer from the contact bumps.

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