Multiple microprocessor intercommunication arrangement

Details Multiple microprocessor intercommunication arrangement Multiple microprocessor intercommunication arrangement

G - Physics

06

F

340/84

G06F 15/16 (2006.01) G06F 13/16 (2006.01) G06F 15/167 (2006.01)

Patent

CA 1100590

A MULTIPLE MICROPROCESSOR INTERCOMMUNICATION ARRANGEMENT Abstract The present invention relates to method and apparatus for providing a communication arrangement between two or more independently operable microprocessor units (MPUs). Large amounts of data or data in block format are capable of being passed between MPUs via the present intercommunication channel with little handshaking between MPUs. In the present arrangement, a plurality of MPUs sequentially access, under the control of a synchronous clock, a common memory for random access to blocks of memory for writing data therein or for reading data previously written therein without the necessity for contention resolving means.

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