Multiplexed synchronous/asynchronous data bus and method...

Details Multiplexed synchronous/asynchronous data bus and method... Multiplexed synchronous/asynchronous data bus and method...

H - Electricity

04

L

H04L 5/00 (2006.01) G06F 13/42 (2006.01)

Patent

CA 2162015

A multiplexed synchronous / asynchronous data bus (109) uses three communications lines (T, C, R) to convey bi-directional synchronous data between two data devices (115, 609) at a relatively low data transfer rate. The data bus is configured as a full-duplex asynchronous data bus by communicating a false address between the two data devices on two communications lines (T, C) using the synchronous data bus, holding the two communications lines (T, C) in a logic high state for a period of time, and continuing to hold one of the two communications lines (C) in the logic high state during full-duplex asynchronous communication. Full- duplex asynchronous data can then communicated between the two data devices (115, 609) at a higher data transfer rate on two of the three communications lines (T, R).

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