Multiplication circuit using a multiplier and a carry...

Details Multiplication circuit using a multiplier and a carry... Multiplication circuit using a multiplier and a carry...

G - Physics

06

F

354/167

G06F 7/52 (2006.01) G06F 11/00 (2006.01) G06F 11/16 (2006.01)

Patent

CA 1232072

ABSTRACT OF THE DISCLOSURE A multiplication circuit used for a high speed multiplier in a computer system is basically constituted by a multiplier and a carry propagating adder, the multiplier obtains a sum and carry per each bit by using carry save adder trees having a plurality of carry save adders, and generates a carry generation function and a carry propagation function based on the sum and carry by using a generation/propagation unit. The carry prop- gating adder obtains a final product based on the carry generation function and carry propagation function, and the carry generation function and carry propagation function generated by the generation/propagation unit are fed back to a final stage of the carry save adder.

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