Multiprocessor load sharing arrangement

Details Multiprocessor load sharing arrangement Multiprocessor load sharing arrangement

G - Physics

06

F

354/233, 354/230

G06F 9/46 (2006.01) G06F 9/50 (2006.01) G06F 15/16 (2006.01) G06F 15/173 (2006.01)

Patent

CA 1318409

Abstract A method and apparatus for allocating work requests among a plurality of processors attached to a data ring. Each processor has an interface for communicating with the data ring. The interface for each work request accepting processor has a memory defining a plurality of destination addresses for which the associated processor will accept work requests. Each type of work request has several destination addresses corresponding to different priority levels. If that processor becomes too heavily loaded, it will delete one or more of the destination addresses for which the interface will accept work requests. Such deletions result in the processor only accepting higher priority requests for a class of work requests. Work request generating processors detect work request messages which have not been accepted when they return on the ring. Such messages are then retransmitted at a higher priority, and with a longer delay between consecutive transmissions of the work request message. Advantageously, such an arrangement permits each processor to regulate its own load based on its own measurements of work activity, while permitting repeated attempts to get each work request accepted.

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