Nand flash memory access with relaxed timing constraints

Details Nand flash memory access with relaxed timing constraints Nand flash memory access with relaxed timing constraints

G - Physics

11

C

G11C 16/06 (2006.01)

Patent

CA 2703674

Timing constraints on data transfers during access of a NAND flash memory can be relaxed by providing a plurality of data paths that couple the NAND flash memory to a buffer that provides external access to the memory. The buffer defines a bit width associated with the external access, and each of the data paths accommodates that bit width.

Les contraintes de temps rencontrées par les transferts de données lors d'un accès à une mémoire flash NAND peuvent être assouplies par la création de plusieurs chemins de données qui couplent la mémoire flash NAND à un tampon assurant un accès externe à la mémoire. Le tampon présente une largeur de bit associée à l'accès externe et chacun des chemins de données peut accueillir cette largeur de bit.

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