Networking systems

H - Electricity – 04 – L

Patent

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H04L 12/56 (2006.01)

Patent

CA 2297650

A novel networking architecture and technique for reducing system latency caused, at least in part, by access contention for usage of common bus and memory facilities, wherein a separate data processing and queue management forwarding engine and queue manager are provided for each I/O module to process packet/cell control information and delivers queuing along a separate path that eliminates contention with other resources and is separate from the transfer of packet/cell data into and from the memory.

L'invention porte sur un nouveau système de gestion de réseaux et la technique associée destinés à réduire les problèmes de temps de latence d'un système en partie au moins en restreignant l'accès au bus commun et aux facilités de mémoire. Chacun des modules D'E/S possède en propre un traitement de données, un automate de gestion des transferts de files d'attente, et un gestionnaire de files d'attente pour traiter les informations de commande des paquets/cellules et faire passer les files d'attente sur une voie séparée éliminant les conflits avec les autres ressources et distincte du transfert des données de paquets/cellules entrant et sortant de la mémoire.

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