Nibble and word addressable memory to accessing consecutive...

Details Nibble and word addressable memory to accessing consecutive... Nibble and word addressable memory to accessing consecutive...

G - Physics

06

F

354/166, 354/175

G06F 12/02 (2006.01) G06F 7/48 (2006.01) G06F 9/30 (2006.01) G06F 9/302 (2006.01) G06F 9/38 (2006.01)

Patent

CA 1215178

ABSTRACT Apparatus is provided for addressing a memory by word and by one of a number of nibbles within a word, with the ability to increment or decrement nibble and word addresses and thereby access adjacent nibbles and words without having to generate new nibble and word addresses. An initial word address is placed in an address counter and an initial nibble address is placed in a nibble control. The two addresses indicate a particular nibble within a particular word. Thereafter, only increment or decrement signals are provided to increment and decrement the nibble address and/or the word address. A nibble counter counts the increment and decrement nibble signals and when the last or first nibble in a word is addressed, an increment or decrement word address signal is respectively generated that changes the word address stored in the address counter.

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