Noise/interference suppression system

H - Electricity – 04 – M

Patent

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H04M 1/19 (2006.01) H04Q 11/04 (2006.01) H04L 27/26 (2006.01)

Patent

CA 2326948

A noise suppression circuit for a communications channel (12) comprises a noise reference extraction device (14), for example a hybrid transformer or circuit, for extracting from an input signal (S) a reference signal (N CM) corresponding to a noise component in the input signal and supplying the noise reference signal to a noise estimation unit (16) which derives therefrom a noise estimate (Y j) which is subtracted from the input signal to produce a noise-suppressed output signal (D OUT). The noise suppression circuit comprises a first analog-to-digital converter (24) for digitizing the input signal at a first sampling rate (Fs) and a second analog-to-digital converter for sampling the noise reference signal (N CM) at a second, lower sampling rate (FS/M), the ratio (M) between the two sampling rates being an integer. A decimator (40) decimates the input signal to produce a decimated signal (D j+N j). An adaptive filter (34) produces a noise estimate signal (Y'j) that is subtracted from the decimated signal to produce an error signal (.epsilon.j) which is used by adaptive filter (34) to adjust its coefficients. An interpolator (36) interpolates the interim noise estimate signal (Y'j) by the same integer (M) to provide a noise estimate signal (Y j) which is subtracted from a digitized and delayed version of the input signal to produce the noise-suppressed output signal (D OUT).

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