Noise reduction circuit

Details Noise reduction circuit Noise reduction circuit

H - Electricity

04

N

350/81

H04N 9/64 (2006.01) H04N 5/21 (2006.01)

Patent

CA 1228671

- 1 - Abstract: A noise reduction circuit for reducing noise in a video signal comprises delay circuits for respectively delaying an output video signal for delay times 2S and H-S (H is one horizontal scanning period and S is a half of one period of the color subcarrier). The outputs of the delay circuits are averaged and the resultant signal is subtracted from an input video signal. The output of the subtraction circuit is attenuated and an addition circuit adds the attenuated output to the input video signal. An edge detection circuit detects an edge of a pattern in the input video signal, and the attenuation factor is set to zero when the pattern edge is detected.

491347

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