Noise reduction circuit for a video signal

H - Electricity – 04 – N

Patent

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Details

350/48, 350/81

H04N 5/21 (2006.01)

Patent

CA 1202413

ABSTRACT OF THE DISCLOSURE A noise reduction circuit for a video signal, comprises a delay circuit for delaying an input video signal by a predetermined delay time which is m times one horizontal scanning period, where m is an integer including one, a first adding circuit for adding the input video signal and the delayed video signal, a subtracting circuit for performing a subtraction between the input video signal and the delayed video signal, a noise clipping circuit for eliminating a noise component which is multiplexed at a zero level of an output signal of the subtracting circuit, and for producing a signal having a waveform corresponding to a correlation error which is introduced in an output signal of the first adding circuit due to the addition performed in the first adding circuit, and a second adding circuit for adding the output signals of the first adding circuit and the noise clipping circuit so as to produce a video signal in which the correlation error has been compensated and the noise has been reduced.

451092

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