G - Physics – 11 – C
Patent
G - Physics
11
C
352/82.3
G11C 11/08 (2006.01) G11C 11/34 (2006.01) G11C 11/417 (2006.01)
Patent
CA 1114952
NON-DESTRUCTIVE INTERROGATION CONTROL CIRCUIT FOR A VARIABLE THRESHOLD FET MEMORY ABSTRACT OF THE DISCLOSURE An illustrative embodiment of the invention provides a substantially non-destructive interrogation of a memory cell circuit comprising a P-channel variable threshold insulated gate field effect memory transistor device. The memory cell circuit provides a fixed current for interrogation of the memory cell transistor such that the disturb voltage (the voltage im- pressed across the insulator of the memory transistor during interrogation) is minimized and is a function of the current and the gain of the memory cell device and not the threshold voltage of the memory device. The disturb voltage is readily calculable and is maintained constant for all interrogations; thus, enabling one to calculate the maximum number of interrogations of the memory cell before the disturb voltage destroys the memory threshold of the memory cell. Rewriting of the data in the memory cell is performed before the memory threshold is destroyed. In addition, a sense latch circuit is provided for sensing the memory data of the memory cell without applying an additional disturb potential to the device.
288941
Kirby Eades Gale Baker
Sperry Rand Corporation
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