Non-overlapping clock generator

Details Non-overlapping clock generator Non-overlapping clock generator

H - Electricity

03

K

354/231

H03K 5/15 (2006.01) H03B 27/00 (2006.01) H03K 5/151 (2006.01)

Patent

CA 1106070

Feucht 2 NON-OVERLAPPING CLOCK GENERATOR ABSTRACT OF THE DISCLOSURE A two-phase, non-overlapping clock signal is generated in response to a single-phase input clock sig- nal by delaying the input clock signal to produce the first phase output clock signal (?1), producing a delayed signal from the first phase clock signal, and gating the further delayed first phase clock signal with the input clock sig- nal to produced an inverted signal for a second phase clock signal (?2), in order to produced gaps between the trailing edge of one phase of the output clock and the leading edge of the other phase of the output clock signal in order to accommodate dynamic transient conditions that must occur in a following utilization circuit between successive phase clock pulse signals. -l-

298743

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