G - Physics – 06 – F
Patent
G - Physics
06
F
354/241
G06F 12/02 (2006.01) G06F 12/08 (2006.01)
Patent
CA 2016544
NONCACHEABLE ADDRESS RANDOM ACCESS MEMORY Abstract of the Disclosure A computer system uses a random access memory to store memory characteristic information, such as noncacheable status. The memory is coupled to the processor address lines to produce an output representative of the memory address block, the output used as appropriate, for example by the noncacheable address input of a cache controller. Latches are used to store programming mode, write or read operation and data values. The reading and writing of the random access memory is performed without disturbing the main memory.
Brasher Gary L.
Culley Paul R.
Nuckols James H.
Thome Gary W.
Compaq Computer Corporation
Finlayson & Singlehurst
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