Offset adjustment circuit

Details Offset adjustment circuit Offset adjustment circuit

H - Electricity

03

F

330/20

H03F 3/45 (2006.01)

Patent

CA 1068795

Application for Patent of Ronald W. Russell for OFFSET ADJUSTMENT CIRCUIT ABSTRACT OF THE DISCLOSURE An offset adjustment circuit for a differential am- plifier includes a current source connected in series with a resistor for establishing a biasing voltage for a pair of field effect transistors (FET) having variable resistors in their biasing circuits. These FET's are connected to intro- duce currents respective connections between an input stage and a second stage of the differential amplifier. The dif- ference of the currents supplied by the FET's divided by the transconductance of the input stage of the differential amplifier corresponds to an offset which remains fixed with changes in temperature. The offset introduced by the FET's, as determined by the adjusted values of the resistors in their biasing circuits, may be in opposition to the offset of the differential amplifier to either reduce it partially or com- pletely, or it may be additive to the offset of the differ- ential amplifier, as desired.

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