On chip ram interconnect to mpu bus

Details On chip ram interconnect to mpu bus On chip ram interconnect to mpu bus

G - Physics

11

C

354/241

G11C 11/34 (2006.01)

Patent

CA 1118111

SC-78281 ON CHIP RAM INTERCONNECT TO MPU BUS Abstract A microprocessor interconnected to a RAM on the same integrated circuit chip is provided. Interconnect circuitry connects the RAM to the microprocessor data bus to allow RAM data to be transferred to an instruction register of the microprocessor which permits the RAM to contain instructions and operation codes. A sense amplifier is used to provide an output from the RAM. At least one buffer is coupled to the output of the sense amplifier. A bilateral switch is coupled to the at least one buffer and controllably switches the output of the at least one buffer to the microprocessor internal data bus and to an external data bus.

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