One-time-programmable logic bit with multiple logic elements

Details One-time-programmable logic bit with multiple logic elements One-time-programmable logic bit with multiple logic elements

H - Electricity

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H01L 21/8246 (2006.01) G11C 17/16 (2006.01) H01L 23/525 (2006.01) H01L 27/105 (2006.01) H01L 27/112 (2006.01) H01L 27/118 (2006.01)

Patent

CA 2666120

A memory cell with a logic bit has a first one-time-programmable ("OTP") memory element providing a first OTP memory element output and a second OTP memory element providing a second OTP memory element output. A logic operator coupled to the first OTP memory element output and to the second OTP memory element output and provides a binary memory output of the memory cell. In a particular embodiment, the first OTP memory element is a different type of OTP memory than the second OTP memory element. Examples of the memory elements are polysilicon fuses having necks of different width, metsl fuses, and antifuses.

Une cellule de mémoire avec un bit logique comprend un premier élément de mémoire programmable une seule fois (<= OTP >=) qui fournit une première sortie d'élément de mémoire OTP, et un second élément de mémoire OTP qui fournit une seconde sortie d'élément de mémoire OTP. Un opérateur logique est couplé à la première sortie d'élément de mémoire OTP et à la seconde sortie d'élément de mémoire OTP, et il fournit une sortie de mémoire binaire de la cellule de mémoire. Dans un mode de réalisation particulier, le premier élément de mémoire OTP est un type de mémoire OTP différent du second élément de mémoire OTP.

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