Optimizing non-preemptible read-copy update for low-power...

Details Optimizing non-preemptible read-copy update for low-power... Optimizing non-preemptible read-copy update for low-power...

G - Physics

06

F

G06F 1/28 (2006.01) G06F 9/46 (2006.01) G06F 15/16 (2006.01)

Patent

CA 2663983

A technique for low-power detection of a grace period following a shared data element update operation that affects non-preemptible data readers. A grace period processing action is implemented that requires a processor that may be running a non-preemptible reader of the shared data element to pass through a quiescent state before further grace period processing can proceed. A power status of the processor is also determined. Further grace period processing may proceed without requiring the processor to pass through a quiescent state if the power status indicates that quiescent state processing by the processor is unnecessary.

Affiliated with

Also associated with

Rating

Optimizing non-preemptible read-copy update for low-power... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Optimizing non-preemptible read-copy update for low-power..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Optimizing non-preemptible read-copy update for low-power... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1369916