Ordered and reliable maintenance of inter-process...

G - Physics – 06 – F

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G06F 13/14 (2006.01) G06F 9/46 (2006.01) G06F 11/14 (2006.01) G06F 15/80 (2006.01)

Patent

CA 2210522

An apparatus and method, using an inter-processor lock to control access to inter-process relationship data structures in the memory (3a, 3b, ..., 3n) of each processor (2a, 2b, ..., 2n) in a multiprocessor system (1). The apparatus and method insure that each inter-process relationship is modified in the same sequence on each processor (2a, 2b, ..., 2n). The apparatus and method also insure that an inter-process relationship is maintained in a consistent state in the face of failure of any of the processors (2a, 2b, ..., 2n).

L'invention concerne un dispositif et un procédé qui consistent à utiliser un verrouillage interprocesseur pour contrôler l'accès aux structures de données propres aux relations entre les processus dans la mémoire (3a, 3b, ..., 3n) de chaque processeur (2a, 2b, ..., 2n) d'un système multiprocesseur (1). Le dispositif et le procédé en question permettent de modifier chaque relation entre les processus en suivant le même ordre pour chacun des processeurs (2a, 2b, ..., 2n). En outre, une fonction est prévue pour maintenir chaque relation entre les processus dans un état cohérent en cas de défaillance de l'un quelconque des processeurs (2a, 2b, ..., 2n).

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