Ordered and reliable signal delivery in a distributed...

G - Physics – 06 – F

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G06F 9/46 (2006.01) G06F 11/00 (2006.01) G06F 11/14 (2006.01)

Patent

CA 2211123

An apparatus and method, using an inter-processor lock to coordinate signal delivery to a process group (G1) whose member processes (P100, P110, P120) are distributed across multiple processors (2a, 2b, 2c). The apparatus and method insure that each process group memory process receives the same signals in the same order and that no signal is duplicated. The apparatus and method also insure that a partially completed signal delivery is completed even in the face of failure of the signalling processor.

L'invention concerne un dispositif et un procédé qui consistent à utiliser un verrouillage interprocesseur pour coordonner les transmissions de signaux vers un groupe de processus (G1) dont les différents processus (P100, P110, P120) sont répartis entre des processeurs multiples (2a, 2b, 2c). Le dispositif et le procédé permettent à chaque processus mémoire d'un groupe de processus de recevoir les mêmes signaux dans le même ordre et sans chevauchement de signaux. En outre, une fonction est prévue pour achever les transmissions partielles de signaux même en cas de défaillance du processeur envoyant les signaux.

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