Outer and asynchronous storage extension system

G - Physics – 06 – F

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354/239

G06F 13/00 (2006.01) G06F 12/06 (2006.01)

Patent

CA 1078070

ABSTRACT OF THE DISCLOSURE Extending the size of the main memory of a data processing system having a synchronous inner storage unit by attaching a relocation translator having special connection interfaces and translated addressing for attaching a synchro- nous outer storage unit and an asynchronous storage unit which may be remotely located from the processor. A different form of storage cycle is generated by the transla- tor for interfacing each of the three storage units being accessed. The translator performs address translation which expands the number of bits in the physical address to support the extended main memory. The extended address uses a concatenation of a program-derived address and a machine- derived address key. The maximum extendable size of the memory can substan- tially exceed the maximum addressing capability of any program, which is determined by the relocatable addressability obtained through any stack of segmentation registers. The maximum extendable size of the main memory is determined by the number of bit positions in the physical block address field in a segmentation register (for addressing a physical block in any of the storage units) concatenated with the number of bit positions needed to address a location in any selected storage block.

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