G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 7/50 (2006.01) G06F 9/302 (2006.01)
Patent
CA 2072265
In an overflow detection circuit for A+B operation, an inverter outputs a value V B, comprising inverted bits of a numeric part of an addend B. A comparator receives as an input a numeric part V A of an augend A and an output V B, of the inventer, and responsive thereto outputs a signal C indicating whether or not V A > V B, is given. Sign parts S A and S B of A and B and the output C of the comparator are inputted into a decoder and an overflow signal "0" is outputted. The decoder is a circuit which outputs "1" when S A and S B are "0" and V A(V A > V B') is large and when S A and S B are "1" and V A is small (VA=V B'), and output "0" in other cases. If the comparator is a circuit for determining V A~V B', the overflow of A+B+1 can be detected. Thus, the overflow of the result of operation can be detected earlier than an adder and a subtracter output the results.
Corporation Nec
Smart & Biggar
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