Package for mounting and interconnecting a plurality of...

H - Electricity – 05 – K

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H05K 7/20 (2006.01) H01L 23/433 (2006.01) H01L 23/473 (2006.01) H01L 23/538 (2006.01) H05K 1/00 (2006.01) H05K 1/03 (2006.01)

Patent

CA 1137647

IMPROVED PACKAGE FOR MOUNTING AND INTERCONNECTING A PLURALITY OF LARGE SCALE INTEGRATED SEMICONDUCTOR DEVICES ABSTRACT A package for mounting interconnecting, and cooling a large number of integrated circuit semiconductor devices having a sintered multilayer ceramic substrate provided with an internal metallurgy network made up of voltage planes, X and Y signal planes, and fan-out planes, with I/O pins on the bottom surface and a plurality of asymmetrical solder pad clusters for flip chip bonding to a plurality of inte- grated circuit devices on the top surface, a plurality of integrated circuit devices bonded to the solder pad clusters, at least one row elongated engineering change pads surround- ing each pad cluster, each pad provided with a severable surface link, the I/O pins connected to the internal network of the substrate and arranged in clusters with the powering voltages of each device located directly beneath the device thereby minimizing voltage drop, and signal voltages in- putted through the I/O pins interspersed between the clust- ers of power pins, a cap for forming an enclosure over at least the top surface of the ceramic substrate, and a liquid cooling means associated with the cap for removing heat from the devices. FI 9-79-045

349746

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