H - Electricity
04
L
H04L 12/56 (2006.01)
Patent
CA 2098496
The present invention pertains to a packet switch (10) comprised of a global shared-memory queue (12) having M storage addresses (14) in which respective packets are stored, where M ~ 3. The switch (10) is also comprised of a presentation network (16) having N input ports (18) for receiving packets and providing the packets to desired addresses (14) in the queue (12) where N ~ 3. The queue (12) is in communication with the presentation network (16) for receiving the packets. The switch (10) is also comprised of a distribution network (20) having J input port where J ~ 1, for receiving packets from the queue (12) and providing them to the desired output port (24). The distribution network (20) is in communication with the queue (12). There is also means for ordering packets received by the presentation network (16) such that packets received sequentially by the presentation network (16) are provided to consecutive addresses (14) in the queue (12).
Bianchini Ronald Jr.
Kim Hyong S.
Borden Ladner Gervais Llp
Carnegie Mellon University
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