Packet switch suitable for integrated circuit implementation

Details Packet switch suitable for integrated circuit implementation Packet switch suitable for integrated circuit implementation

H - Electricity

04

L

344/25

H04L 12/56 (2006.01) H04L 12/52 (2006.01)

Patent

CA 1334304

A packet switch for exchanging packets received over a plurality of input lines and outputting exchanged packets, to a plurality of output lines includes multiplexing means for time-division multiplexing the packets received over the plurality of input lines to multiplexed packets. Address detecting means detect an address of each packet in the multiplexed packets to produce a destination address and write address generating means are responsive to the destination address for generating write address. Read address generating means sequentially generate read addresses and memory means constituted by a plurality of memory areas individually associated with the plurality of output lines are responsive to the write address for storing each packet of the multiplexed packets in any of the memory areas, and are responsive to the read addresses for producing exchanged multiplexed packets by reading the stored packets. Demultiplexing means demultiplex the exchanged multiplexed packets into the exchanged packets and deliver them to the plurality of output lines.

597483

Affiliated with

Also associated with

Rating

Packet switch suitable for integrated circuit implementation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Packet switch suitable for integrated circuit implementation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Packet switch suitable for integrated circuit implementation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1269367