Packet switch trunk circuit queueing arrangement

Details Packet switch trunk circuit queueing arrangement Packet switch trunk circuit queueing arrangement

H - Electricity

04

L

344/28

H04L 12/56 (2006.01)

Patent

CA 1252870

- 19 - POCKET SWITCH TRUNK CIRCUIT QUEUEING ARRANGEMENT Abstract A trunk circuit interfaces a multichannel data signal to a communication facility using a high priority queue (HPQ) memory, a low priority queue (LPQ) memory, and a data packet sorter including a separate LPQ counter for each data channel. Each LPQ channel counter keeps track of data packets from the associated channel which are stored in the LPQ memory. The packet sorter sorts data packets according to size. Small data packets from each channel which are smaller than a predetermined length are sorted for storage in the HPQ memory only when the associated LPQ channel counter is zero. Small data packets having a non-zero LPQ channel count and large data packets are stored in the LPQ memory. The trunk circuit first transmits data packets from the HPQ memory and then from the LPQ memory.

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