Packet switches, switching methods, protocols and networks

Details Packet switches, switching methods, protocols and networks Packet switches, switching methods, protocols and networks

H - Electricity

04

L

344/28

H04L 12/56 (2006.01) H04L 12/433 (2006.01) H04L 12/64 (2006.01) H04L 29/06 (2006.01)

Patent

CA 1337664

A packet switching techniques, protocols, networks, and equipment for use on a local area or wide area scale. Packets include a fixed-length data field and memory offset field are employed so that packeting, block data transfer to contiguous memory and depacketing are effected at the destination by hardware-mediated processes with minimal processor involvement. Multiple sessions are readily handled by assigning addresses to multiple memory buffers at the destination. Each packet carrying computer data provides three levels of addressing for its data segment corresponding to the destination node or device, the memory buffer and the memory location. The equipment includes loopbased, collision-free packet switches in which packets are modified and re- circulated when a destination is busy. Loop latency is minimized and data transfer rates maximize by the use of fully-buffering parallel forms of the switch. A method for handling broadcast is also disclosed, together with a technique for preempting low priority packets and exploiting short-cuts on a loop. These improvements allow application of the technique to a high-speed voice/data packet-switching in large wide area networks as well as in small local area networks. Thus, an extensive, powerful and extremely fast integrated communications subnet can be build in hardware with little processor intervention. - 55 -

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