Pad design for stt-mram

H - Electricity – 01 – L

Patent

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Details

H01L 23/528 (2006.01) H01L 27/22 (2006.01)

Patent

CA 2723830

A pad with reduced capacitance loading for a Spin Transfer Torque Magnetoresistive Random Access Mem-ory (STT-MRAM) bit cell array is provided. The pad includes a plurality of hollow-shaped lower metal layers and a planar top metal layer formed on an uppermost layer of the plurality of hollow-shaped lower metal layers. Image

L'invention porte sur un plot à charge faible pour un réseau de cellules binaires de mémoire vive magnétorésistive à couple de transfert de spin (STT-MRAM). Le plot à charge faible comprend une pluralité de couches de métal inférieures de forme creuse et une couche de métal supérieure formée sur une couche la plus supérieure de la pluralité de couches de métal inférieures de forme creuse.

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