Parallel bit detection of frame synchronization information...

H - Electricity – 03 – M

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354/105

H03M 9/00 (2006.01) H04J 3/06 (2006.01) H04L 12/56 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 2016643

A parallel frame synchronization circuit converts an incoming serial bit stream containing frame synchronization information into parallel data words on arbitrary boundaries of fixed bit length. Detectors forming part of the present invention determine from the parallel converted data the presence of synchronization information so as to align the incoming serial data into parallel data aligned on frame boundaries by manipulating parallel words. The present invention is particularly suited for fabrication in complimentary metal oxide silicon (CMOS) technology and in a preferred embodiment is used to synchronize incoming data comporting to the synchronous optical network (SONET) telecommunication standard.

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