Parallel concatenated convolutional coding

Details Parallel concatenated convolutional coding Parallel concatenated convolutional coding

H - Electricity

04

L

H04L 1/22 (2006.01) H03M 13/29 (2006.01) H04L 1/00 (2006.01)

Patent

CA 2243013

In a parallel concatenated convolutional code (PCCC) or turbo code encoder, information bits are supplied to a first convolutional code encoder for producing first parity bits and via an interleaver to a second convolutional code encoder for producing second parity bits, the output of the encoder comprising the information bits and at least some of the first and second parity bits. The interleaver interleaves the information bits in groups each of N bits, where N is an integer greater than one. A parity bit generator can generate additional parity bits which are operated on by the convolutional code encoders and interleaver. A complementary decoder is described. The grouped interleaving can provide reduced memory requirements and faster convergence of the iterative decoding process.

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