Parallel cyclic redundancy checking circuit

Details Parallel cyclic redundancy checking circuit Parallel cyclic redundancy checking circuit

G - Physics

06

F

354/227

G06F 11/08 (2006.01) H03M 13/01 (2006.01) H03M 13/09 (2006.01)

Patent

CA 1191963

PARALLEL CYCLIC REDUNDANCY CHECKING CIRCUIT ABSTRACT OF THE DISCLOSURE A parallel cyclic redundancy checking circuit which determines the validity of digital, binary, cyclical data. The parallel structure of this circuit enables it to check high frequency data. Shift reg- isters store sequentially occurring parallel groups of data and a feedback network comprising exclusive- or gates provides a coding arrangement which produces a resultant data pattern to indicate the validity of the cyclical parallel input data. Resultant data patterns are periodically stored in a random-access- memory which initializes the shift registers to pro- vide a time sharing operation. A comparator detects invalid data by comparing the resultant patterns with expected values.

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